The present invention relates to a method of manufacturing a semiconductor integrated circuit device and, more particularly, to a technology which is effective if applied to a semiconductor integrated circuit device having a bipolar transistor.
On pp. 16 to 19 of SESSION 2. 2 of IEDM, 1987, there is reported a bipolar transistor which adopts the EBT (E pitaxial Base Transistor) structure using an SPESG (Selective Poly-and-Epitaxial-Silicon Growth) technology. The bipolar transistor adopting the EBT structure has its base region formed of a P-type semiconductor region which is deposited over the principal face of an n-type collector region formed in a single crystal semiconductor substrate. With the peripheral of the base region, there is electrically connected a base lead-out layer which is prepared by doping a polycrystalline silicon film highly with a P-type impurity in a high concentration. The base lead-out layer extends over an isolation oxide film (or field insulating film) which is formed over the semiconductor substrate by a LOCOS (Local Oxidation of Silicon) method. Both the base region and the base lead-out layer are formed by using a manufacture process intrinsic to the reported EBT structure and by the same manufacture process. In other words, the base region and the base lead-out layer are simultaneously formed of silicon films which are deposited (or epitaxially grown) over the collector region and the isolation oxide film by a CVD (Chemical Vapor Deposition) method. Of these silicon films, the silicon film deposited over the collector region is formed of a single crystal and used as a base region because the semiconductor substrate where the collector region is formed is made of a single crystal. On the other hand, the silicon film deposited over the isolation oxide film is formed of a polycrystal and used as the base lead-out layer because the isolation oxide film is not made of a single crystal but is amorphous. The emitter region of the bipolar transistor is formed of an n-type semiconductor region which is prepared by doping the principal face of the base region selectively with an n-type impurity. The bipolar transistor adopting this EBT structure can have a shallow base region junction to operate at a high speed because the junction depth of the base region can be set by the thickness of the single crystal silicon film deposited on the collector region. Since, moreover, the base region can be formed in a self-alignment manner with the collector region, the bipolar transistor can be highly integrated with the result that the semiconductor integrated circuit device having the bipolar transistor can be highly integrated.